Atomic Transactional Execution in Hardware: A New High-Performance Abstraction for Databases?

Advances in hardware technology have deep implications on future database system designs [1]. Increasing transistor densities, faster processors, larger memories, and low inter-chip communication latencies have enabled new hardware mechanisms such as processors supporting speculative execution, large on-chip buffering, and aggressive multiprocessor system organizations with cache coherence. As a result, much of the support required to implement hardware transactions is now either present in modern processors or their implementations are well understood. This paper discusses one such proposal. It is based on a hardware mechanism called Transactional Lock Removal [2] (TLR), which was originally designed to support the atomic execution of critical sections by a lock-based multithreaded program in a lock-free manner. In this paper, we explain the mechanism and suggest how it could be used to control the atomic execution of transactions in a database system.